Scalable Shared-memory Multiprocessing and the Silicon Graphics S2MP Architecture

Daniel Lenoski
Silicon Graphics Computer Systems
(video tape)

Distributed shared-memory (DSM) systems offer the advantages of the shared-memory programming model while eliminating the bottlenecks of traditional SMP systems. The enabling technologies for DSM systems are directory-based cache coherence and scalable interconnection networks. Silicon Graphics' S2MP architecture and Origin servers provide high-performance and a seamless shared-memory programming model that scales from deskside uniprocessors to 1024-processor supercomputers.

This talk begins with an introduction to distributed shared-memory and directory-based cache coherence. A technical overview of SGI's Origin is then given. The design trade-offs made in the processor interface, node design, interconnect network, and directory structure and protocol of S2MP are discussed in detail.

About the speaker

Dan Lenoski is Enginneering Director for the hardware development team responsible for SGI's Origin supercomuters. Previously, he held management and senior technical positions at Sun Microsystems and Tandem Computers. During his PhD work at Stanford University, Lenoski was lead architect of the DASH multiprocessor, the first cache-coherent distributed shared-memory system.


Philip Chan, pkc@cs.fit.edu
Last modified: Wed Apr 8 10:30:51 EDT 1998