Revision f230a1cf deps/v8/src/x64/assembler-x64.cc

View differences:

deps/v8/src/x64/assembler-x64.cc
44 44
#endif
45 45
uint64_t CpuFeatures::supported_ = CpuFeatures::kDefaultCpuFeatures;
46 46
uint64_t CpuFeatures::found_by_runtime_probing_only_ = 0;
47

  
47
uint64_t CpuFeatures::cross_compile_ = 0;
48 48

  
49 49
ExternalReference ExternalReference::cpu_features() {
50 50
  ASSERT(CpuFeatures::initialized_);
......
110 110
#endif
111 111

  
112 112
  // Patch the code.
113
  patcher.masm()->movq(r10, target, RelocInfo::NONE64);
114
  patcher.masm()->call(r10);
113
  patcher.masm()->movq(kScratchRegister, target, RelocInfo::NONE64);
114
  patcher.masm()->call(kScratchRegister);
115 115

  
116 116
  // Check that the size of the code generated is as expected.
117 117
  ASSERT_EQ(Assembler::kCallSequenceLength,
......
1465 1465

  
1466 1466
void Assembler::movq(Register dst, int64_t value, RelocInfo::Mode rmode) {
1467 1467
  // Non-relocatable values might not need a 64-bit representation.
1468
  if (RelocInfo::IsNone(rmode)) {
1469
    if (is_uint32(value)) {
1470
      movl(dst, Immediate(static_cast<int32_t>(value)));
1471
      return;
1472
    } else if (is_int32(value)) {
1473
      movq(dst, Immediate(static_cast<int32_t>(value)));
1474
      return;
1475
    }
1468
  ASSERT(RelocInfo::IsNone(rmode));
1469
  if (is_uint32(value)) {
1470
    movl(dst, Immediate(static_cast<int32_t>(value)));
1471
  } else if (is_int32(value)) {
1472
    movq(dst, Immediate(static_cast<int32_t>(value)));
1473
  } else {
1476 1474
    // Value cannot be represented by 32 bits, so do a full 64 bit immediate
1477 1475
    // value.
1476
    EnsureSpace ensure_space(this);
1477
    emit_rex_64(dst);
1478
    emit(0xB8 | dst.low_bits());
1479
    emitq(value);
1478 1480
  }
1479
  EnsureSpace ensure_space(this);
1480
  emit_rex_64(dst);
1481
  emit(0xB8 | dst.low_bits());
1482
  emitq(value, rmode);
1483 1481
}
1484 1482

  
1485 1483

  
1486 1484
void Assembler::movq(Register dst, ExternalReference ref) {
1487
  int64_t value = reinterpret_cast<int64_t>(ref.address());
1485
  Address value = reinterpret_cast<Address>(ref.address());
1488 1486
  movq(dst, value, RelocInfo::EXTERNAL_REFERENCE);
1489 1487
}
1490 1488

  
......
1899 1897
}
1900 1898

  
1901 1899

  
1902
void Assembler::xchg(Register dst, Register src) {
1900
void Assembler::xchgq(Register dst, Register src) {
1903 1901
  EnsureSpace ensure_space(this);
1904 1902
  if (src.is(rax) || dst.is(rax)) {  // Single-byte encoding
1905 1903
    Register other = src.is(rax) ? dst : src;
......
1917 1915
}
1918 1916

  
1919 1917

  
1918
void Assembler::xchgl(Register dst, Register src) {
1919
  EnsureSpace ensure_space(this);
1920
  if (src.is(rax) || dst.is(rax)) {  // Single-byte encoding
1921
    Register other = src.is(rax) ? dst : src;
1922
    emit_optional_rex_32(other);
1923
    emit(0x90 | other.low_bits());
1924
  } else if (dst.low_bits() == 4) {
1925
    emit_optional_rex_32(dst, src);
1926
    emit(0x87);
1927
    emit_modrm(dst, src);
1928
  } else {
1929
    emit_optional_rex_32(src, dst);
1930
    emit(0x87);
1931
    emit_modrm(src, dst);
1932
  }
1933
}
1934

  
1935

  
1920 1936
void Assembler::store_rax(void* dst, RelocInfo::Mode mode) {
1921 1937
  EnsureSpace ensure_space(this);
1922 1938
  emit(0x48);  // REX.W
......
2035 2051
}
2036 2052

  
2037 2053

  
2054
void Assembler::testl(const Operand& op, Register reg) {
2055
  EnsureSpace ensure_space(this);
2056
  emit_optional_rex_32(reg, op);
2057
  emit(0x85);
2058
  emit_operand(reg, op);
2059
}
2060

  
2061

  
2038 2062
void Assembler::testq(const Operand& op, Register reg) {
2039 2063
  EnsureSpace ensure_space(this);
2040 2064
  emit_rex_64(reg, op);
......
2058 2082

  
2059 2083

  
2060 2084
void Assembler::testq(Register dst, Immediate mask) {
2085
  if (is_uint8(mask.value_)) {
2086
    testb(dst, mask);
2087
    return;
2088
  }
2061 2089
  EnsureSpace ensure_space(this);
2062 2090
  if (dst.is(rax)) {
2063 2091
    emit_rex_64();
......
2448 2476
}
2449 2477

  
2450 2478

  
2479
// SSE operations.
2480

  
2481
void Assembler::andps(XMMRegister dst, XMMRegister src) {
2482
  EnsureSpace ensure_space(this);
2483
  emit_optional_rex_32(dst, src);
2484
  emit(0x0F);
2485
  emit(0x54);
2486
  emit_sse_operand(dst, src);
2487
}
2488

  
2489

  
2451 2490
// SSE 2 operations.
2452 2491

  
2453 2492
void Assembler::movd(XMMRegister dst, Register src) {
......
2550 2589

  
2551 2590

  
2552 2591
void Assembler::extractps(Register dst, XMMRegister src, byte imm8) {
2553
  ASSERT(CpuFeatures::IsSupported(SSE4_1));
2592
  ASSERT(IsEnabled(SSE4_1));
2554 2593
  ASSERT(is_uint8(imm8));
2555 2594
  EnsureSpace ensure_space(this);
2556 2595
  emit(0x66);
2557
  emit_optional_rex_32(dst, src);
2596
  emit_optional_rex_32(src, dst);
2558 2597
  emit(0x0F);
2559 2598
  emit(0x3A);
2560 2599
  emit(0x17);
2561
  emit_sse_operand(dst, src);
2600
  emit_sse_operand(src, dst);
2562 2601
  emit(imm8);
2563 2602
}
2564 2603

  
......
3000 3039

  
3001 3040
void Assembler::RecordRelocInfo(RelocInfo::Mode rmode, intptr_t data) {
3002 3041
  ASSERT(!RelocInfo::IsNone(rmode));
3003
  // Don't record external references unless the heap will be serialized.
3004 3042
  if (rmode == RelocInfo::EXTERNAL_REFERENCE) {
3043
    // Don't record external references unless the heap will be serialized.
3005 3044
#ifdef DEBUG
3006 3045
    if (!Serializer::enabled()) {
3007 3046
      Serializer::TooLateToEnableNow();
......
3010 3049
    if (!Serializer::enabled() && !emit_debug_code()) {
3011 3050
      return;
3012 3051
    }
3052
  } else if (rmode == RelocInfo::CODE_AGE_SEQUENCE) {
3053
    // Don't record psuedo relocation info for code age sequence mode.
3054
    return;
3013 3055
  }
3014 3056
  RelocInfo rinfo(pc_, rmode, data, NULL);
3015 3057
  reloc_info_writer.Write(&rinfo);

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