CSE2410 Fall 2014 Bounce

  // Check whether a feature is supported by the target CPU.

  static bool IsSupported(CpuFeature f) {

    ASSERT(initialized_);

    if (f == SSE3 && !FLAG_enable_sse3) return false;

    if (f == SSE4_1 && !FLAG_enable_sse4_1) return false;

    if (f == CMOV && !FLAG_enable_cmov) return false;

    if (f == SAHF && !FLAG_enable_sahf) return false;

  }

  static bool IsFoundByRuntimeProbingOnly(CpuFeature f) {

    ASSERT(initialized_);

  }

  static bool IsSafeForSnapshot(CpuFeature f) {

            (!Serializer::enabled() || !IsFoundByRuntimeProbingOnly(f)));

  }

 private:

  // Safe defaults include CMOV for X64. It is always available, if

  // anyone checks, but they shouldn't need to check.

  // The required user mode extensions in X64 are (from AMD64 ABI Table A.1):

  static uint64_t supported_;

  static uint64_t found_by_runtime_probing_only_;

  friend class ExternalReference;

  DISALLOW_COPY_AND_ASSIGN(CpuFeatures);

};

  // All 64-bit immediates must have a relocation mode.

  void movq(Register dst, void* ptr, RelocInfo::Mode rmode);

  void movq(Register dst, int64_t value, RelocInfo::Mode rmode);

  // Moves the address of the external reference into the register.

  void movq(Register dst, ExternalReference ext);

  void movq(Register dst, Handle<Object> handle, RelocInfo::Mode rmode);

  void cmovl(Condition cc, Register dst, const Operand& src);

  // Exchange two registers

  // Arithmetics

  void addl(Register dst, Register src) {

    arithmetic_op(0x09, src, dst);

  }

  void or_(Register dst, Immediate src) {

    immediate_arithmetic_op(0x1, dst, src);

  }

    shift(dst, imm8, 0x0);

  }

  void rcr(Register dst, Immediate imm8) {

    shift(dst, imm8, 0x3);

  }

    arithmetic_op_32(0x2B, dst, src);

  }

  void subl(const Operand& dst, Immediate src) {

    immediate_arithmetic_op_32(0x5, dst, src);

  }

  void testb(const Operand& op, Register reg);

  void testl(Register dst, Register src);

  void testl(Register reg, Immediate mask);

  void testl(const Operand& op, Immediate mask);

  void testq(const Operand& op, Register reg);

  void testq(Register dst, Register src);

    immediate_arithmetic_op_32(0x6, dst, src);

  }

  void xorl(const Operand& dst, Immediate src) {

    immediate_arithmetic_op_32(0x6, dst, src);

  }

  void sahf();

  // SSE2 instructions

  void movd(XMMRegister dst, Register src);

  void movd(Register dst, XMMRegister src);

  void movq(XMMRegister dst, Register src);

  void movq(Register dst, XMMRegister src);

  void movq(XMMRegister dst, XMMRegister src);

  // Don't use this unless it's important to keep the

  // top half of the destination register unchanged.

  void movdqu(XMMRegister dst, const Operand& src);

  void movapd(XMMRegister dst, XMMRegister src);

  void cvttsd2si(Register dst, const Operand& src);

  void cvttsd2si(Register dst, XMMRegister src);

  void cvttsd2siq(Register dst, XMMRegister src);

  void cvtqsi2sd(XMMRegister dst, const Operand& src);

  void cvtqsi2sd(XMMRegister dst, Register src);

  void cvtss2sd(XMMRegister dst, XMMRegister src);

  void cvtss2sd(XMMRegister dst, const Operand& src);

  void andpd(XMMRegister dst, XMMRegister src);

  void orpd(XMMRegister dst, XMMRegister src);

  void xorpd(XMMRegister dst, XMMRegister src);

  void sqrtsd(XMMRegister dst, XMMRegister src);

  void ucomisd(XMMRegister dst, XMMRegister src);

  void ucomisd(XMMRegister dst, const Operand& src);

  enum RoundingMode {

    kRoundToNearest = 0x0,

  void roundsd(XMMRegister dst, XMMRegister src, RoundingMode mode);

  // Debugging

  void Print();

  void emit(byte x) { *pc_++ = x; }

  inline void emitl(uint32_t x);

  inline void emitp(void* x, RelocInfo::Mode rmode);

  inline void emitw(uint16_t x);

  inline void emit_code_target(Handle<Code> target,

                               RelocInfo::Mode rmode,

  // Emit the code-object-relative offset of the label's position

  inline void emit_code_relative_offset(Label* label);

  // Emit machine code for one of the operations ADD, ADC, SUB, SBC,

  // AND, OR, XOR, or CMP.  The encodings of these operations are all

  // similar, differing just in the opcode or in the reg field of the