Revision f230a1cf deps/v8/test/cctest/test-disasm-ia32.cc

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deps/v8/test/cctest/test-disasm-ia32.cc
354 354
      CpuFeatureScope fscope(&assm, SSE2);
355 355
      __ cvttss2si(edx, Operand(ebx, ecx, times_4, 10000));
356 356
      __ cvtsi2sd(xmm1, Operand(ebx, ecx, times_4, 10000));
357
      __ movsd(xmm1, Operand(ebx, ecx, times_4, 10000));
358
      __ movsd(Operand(ebx, ecx, times_4, 10000), xmm1);
359
      __ movaps(xmm0, xmm1);
360
      // 128 bit move instructions.
361
      __ movdqa(xmm0, Operand(ebx, ecx, times_4, 10000));
362
      __ movdqa(Operand(ebx, ecx, times_4, 10000), xmm0);
363
      __ movdqu(xmm0, Operand(ebx, ecx, times_4, 10000));
364
      __ movdqu(Operand(ebx, ecx, times_4, 10000), xmm0);
365

  
357 366
      __ addsd(xmm1, xmm0);
358 367
      __ mulsd(xmm1, xmm0);
359 368
      __ subsd(xmm1, xmm0);
360 369
      __ divsd(xmm1, xmm0);
361
      __ movdbl(xmm1, Operand(ebx, ecx, times_4, 10000));
362
      __ movdbl(Operand(ebx, ecx, times_4, 10000), xmm1);
363 370
      __ ucomisd(xmm0, xmm1);
371
      __ cmpltsd(xmm0, xmm1);
364 372

  
365
      // 128 bit move instructions.
366
      __ movdqa(xmm0, Operand(ebx, ecx, times_4, 10000));
367
      __ movdqa(Operand(ebx, ecx, times_4, 10000), xmm0);
368
      __ movdqu(xmm0, Operand(ebx, ecx, times_4, 10000));
369
      __ movdqu(Operand(ebx, ecx, times_4, 10000), xmm0);
373
      __ andps(xmm0, xmm1);
374
      __ andpd(xmm0, xmm1);
375
      __ psllq(xmm0, 17);
376
      __ psllq(xmm0, xmm1);
377
      __ psrlq(xmm0, 17);
378
      __ psrlq(xmm0, xmm1);
379
      __ por(xmm0, xmm1);
370 380
    }
371 381
  }
372 382

  
......
393 403
    }
394 404
  }
395 405

  
396
  // andpd, cmpltsd, movaps, psllq, psrlq, por.
397
  {
398
    if (CpuFeatures::IsSupported(SSE2)) {
399
      CpuFeatureScope fscope(&assm, SSE2);
400
      __ andpd(xmm0, xmm1);
401
      __ andpd(xmm1, xmm2);
402

  
403
      __ cmpltsd(xmm0, xmm1);
404
      __ cmpltsd(xmm1, xmm2);
405

  
406
      __ movaps(xmm0, xmm1);
407
      __ movaps(xmm1, xmm2);
408

  
409
      __ psllq(xmm0, 17);
410
      __ psllq(xmm1, 42);
411

  
412
      __ psllq(xmm0, xmm1);
413
      __ psllq(xmm1, xmm2);
414

  
415
      __ psrlq(xmm0, 17);
416
      __ psrlq(xmm1, 42);
417

  
418
      __ psrlq(xmm0, xmm1);
419
      __ psrlq(xmm1, xmm2);
420

  
421
      __ por(xmm0, xmm1);
422
      __ por(xmm1, xmm2);
423
    }
424
  }
425

  
426 406
  {
427 407
    if (CpuFeatures::IsSupported(SSE2) &&
428 408
        CpuFeatures::IsSupported(SSE4_1)) {
429 409
      CpuFeatureScope scope(&assm, SSE4_1);
430 410
      __ pextrd(eax, xmm0, 1);
431 411
      __ pinsrd(xmm1, eax, 0);
412
      __ extractps(eax, xmm1, 0);
432 413
    }
433 414
  }
434 415

  

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