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main_repo / deps / v8 / src / mips / assembler-mips-inl.h @ f230a1cf
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// Copyright (c) 1994-2006 Sun Microsystems Inc.
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// All Rights Reserved.
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions are
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// met:
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//
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// - Redistributions of source code must retain the above copyright notice,
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// this list of conditions and the following disclaimer.
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//
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// - Redistribution in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the distribution.
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//
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// - Neither the name of Sun Microsystems or the names of contributors may
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// be used to endorse or promote products derived from this software without
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// specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
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// IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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// THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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// PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
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// CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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// PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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// LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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// The original source code covered by the above license above has been
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// modified significantly by Google Inc.
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// Copyright 2012 the V8 project authors. All rights reserved.
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#ifndef V8_MIPS_ASSEMBLER_MIPS_INL_H_
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#define V8_MIPS_ASSEMBLER_MIPS_INL_H_
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#include "mips/assembler-mips.h" |
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#include "cpu.h" |
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#include "debug.h" |
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namespace v8 { |
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namespace internal { |
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// -----------------------------------------------------------------------------
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// Operand and MemOperand.
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Operand::Operand(int32_t immediate, RelocInfo::Mode rmode) { |
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rm_ = no_reg; |
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imm32_ = immediate; |
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rmode_ = rmode; |
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} |
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Operand::Operand(const ExternalReference& f) {
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rm_ = no_reg; |
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imm32_ = reinterpret_cast<int32_t>(f.address()); |
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rmode_ = RelocInfo::EXTERNAL_REFERENCE; |
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} |
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Operand::Operand(Smi* value) { |
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rm_ = no_reg; |
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imm32_ = reinterpret_cast<intptr_t>(value); |
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rmode_ = RelocInfo::NONE32; |
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} |
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Operand::Operand(Register rm) { |
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rm_ = rm; |
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} |
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bool Operand::is_reg() const { |
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return rm_.is_valid();
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} |
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int Register::NumAllocatableRegisters() {
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return kMaxNumAllocatableRegisters;
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} |
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int DoubleRegister::NumRegisters() {
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return FPURegister::kMaxNumRegisters;
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} |
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int DoubleRegister::NumAllocatableRegisters() {
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return FPURegister::kMaxNumAllocatableRegisters;
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} |
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int FPURegister::ToAllocationIndex(FPURegister reg) {
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ASSERT(reg.code() % 2 == 0); |
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ASSERT(reg.code() / 2 < kMaxNumAllocatableRegisters);
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ASSERT(reg.is_valid()); |
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ASSERT(!reg.is(kDoubleRegZero)); |
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ASSERT(!reg.is(kLithiumScratchDouble)); |
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return (reg.code() / 2); |
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} |
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// -----------------------------------------------------------------------------
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// RelocInfo.
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void RelocInfo::apply(intptr_t delta) {
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if (IsCodeTarget(rmode_)) {
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uint32_t scope1 = (uint32_t) target_address() & ~kImm28Mask; |
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uint32_t scope2 = reinterpret_cast<uint32_t>(pc_) & ~kImm28Mask; |
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if (scope1 != scope2) {
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Assembler::JumpLabelToJumpRegister(pc_); |
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} |
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} |
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if (IsInternalReference(rmode_)) {
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// Absolute code pointer inside code object moves with the code object.
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byte* p = reinterpret_cast<byte*>(pc_); |
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int count = Assembler::RelocateInternalReference(p, delta);
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CPU::FlushICache(p, count * sizeof(uint32_t));
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} |
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} |
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Address RelocInfo::target_address() { |
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ASSERT(IsCodeTarget(rmode_) || IsRuntimeEntry(rmode_)); |
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return Assembler::target_address_at(pc_);
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} |
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Address RelocInfo::target_address_address() { |
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ASSERT(IsCodeTarget(rmode_) || |
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IsRuntimeEntry(rmode_) || |
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rmode_ == EMBEDDED_OBJECT || |
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rmode_ == EXTERNAL_REFERENCE); |
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// Read the address of the word containing the target_address in an
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// instruction stream.
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// The only architecture-independent user of this function is the serializer.
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// The serializer uses it to find out how many raw bytes of instruction to
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// output before the next target.
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// For an instruction like LUI/ORI where the target bits are mixed into the
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// instruction bits, the size of the target will be zero, indicating that the
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// serializer should not step forward in memory after a target is resolved
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// and written. In this case the target_address_address function should
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// return the end of the instructions to be patched, allowing the
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// deserializer to deserialize the instructions as raw bytes and put them in
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// place, ready to be patched with the target. After jump optimization,
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// that is the address of the instruction that follows J/JAL/JR/JALR
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// instruction.
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return reinterpret_cast<Address>(
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pc_ + Assembler::kInstructionsFor32BitConstant * Assembler::kInstrSize); |
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} |
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int RelocInfo::target_address_size() {
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return Assembler::kSpecialTargetSize;
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} |
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void RelocInfo::set_target_address(Address target, WriteBarrierMode mode) {
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ASSERT(IsCodeTarget(rmode_) || IsRuntimeEntry(rmode_)); |
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Assembler::set_target_address_at(pc_, target); |
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if (mode == UPDATE_WRITE_BARRIER && host() != NULL && IsCodeTarget(rmode_)) { |
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Object* target_code = Code::GetCodeFromTargetAddress(target); |
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host()->GetHeap()->incremental_marking()->RecordWriteIntoCode( |
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host(), this, HeapObject::cast(target_code)); |
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} |
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} |
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Address Assembler::target_address_from_return_address(Address pc) { |
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return pc - kCallTargetAddressOffset;
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} |
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Object* RelocInfo::target_object() { |
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ASSERT(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT); |
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return reinterpret_cast<Object*>(Assembler::target_address_at(pc_));
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} |
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Handle<Object> RelocInfo::target_object_handle(Assembler* origin) { |
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ASSERT(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT); |
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return Handle<Object>(reinterpret_cast<Object**>(
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Assembler::target_address_at(pc_))); |
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} |
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Object** RelocInfo::target_object_address() { |
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// Provide a "natural pointer" to the embedded object,
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// which can be de-referenced during heap iteration.
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ASSERT(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT); |
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reconstructed_obj_ptr_ = |
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reinterpret_cast<Object*>(Assembler::target_address_at(pc_)); |
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return &reconstructed_obj_ptr_;
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} |
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void RelocInfo::set_target_object(Object* target, WriteBarrierMode mode) {
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ASSERT(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT); |
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ASSERT(!target->IsConsString()); |
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Assembler::set_target_address_at(pc_, reinterpret_cast<Address>(target)); |
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if (mode == UPDATE_WRITE_BARRIER &&
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host() != NULL &&
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target->IsHeapObject()) { |
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host()->GetHeap()->incremental_marking()->RecordWrite( |
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host(), &Memory::Object_at(pc_), HeapObject::cast(target)); |
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} |
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} |
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Address* RelocInfo::target_reference_address() { |
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ASSERT(rmode_ == EXTERNAL_REFERENCE); |
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reconstructed_adr_ptr_ = Assembler::target_address_at(pc_); |
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return &reconstructed_adr_ptr_;
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} |
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Address RelocInfo::target_runtime_entry(Assembler* origin) { |
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ASSERT(IsRuntimeEntry(rmode_)); |
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return target_address();
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} |
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void RelocInfo::set_target_runtime_entry(Address target,
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WriteBarrierMode mode) { |
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ASSERT(IsRuntimeEntry(rmode_)); |
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if (target_address() != target) set_target_address(target, mode);
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} |
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Handle<Cell> RelocInfo::target_cell_handle() { |
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ASSERT(rmode_ == RelocInfo::CELL); |
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Address address = Memory::Address_at(pc_); |
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return Handle<Cell>(reinterpret_cast<Cell**>(address));
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} |
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Cell* RelocInfo::target_cell() { |
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ASSERT(rmode_ == RelocInfo::CELL); |
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return Cell::FromValueAddress(Memory::Address_at(pc_));
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} |
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void RelocInfo::set_target_cell(Cell* cell, WriteBarrierMode mode) {
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ASSERT(rmode_ == RelocInfo::CELL); |
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Address address = cell->address() + Cell::kValueOffset; |
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Memory::Address_at(pc_) = address; |
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if (mode == UPDATE_WRITE_BARRIER && host() != NULL) { |
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// TODO(1550) We are passing NULL as a slot because cell can never be on
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// evacuation candidate.
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host()->GetHeap()->incremental_marking()->RecordWrite( |
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host(), NULL, cell);
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} |
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} |
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static const int kNoCodeAgeSequenceLength = 7; |
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Handle<Object> RelocInfo::code_age_stub_handle(Assembler* origin) { |
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UNREACHABLE(); // This should never be reached on Arm.
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return Handle<Object>();
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} |
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Code* RelocInfo::code_age_stub() { |
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ASSERT(rmode_ == RelocInfo::CODE_AGE_SEQUENCE); |
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return Code::GetCodeFromTargetAddress(
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Memory::Address_at(pc_ + Assembler::kInstrSize * |
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(kNoCodeAgeSequenceLength - 1)));
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} |
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void RelocInfo::set_code_age_stub(Code* stub) {
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ASSERT(rmode_ == RelocInfo::CODE_AGE_SEQUENCE); |
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Memory::Address_at(pc_ + Assembler::kInstrSize * |
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(kNoCodeAgeSequenceLength - 1)) =
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stub->instruction_start(); |
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} |
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Address RelocInfo::call_address() { |
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ASSERT((IsJSReturn(rmode()) && IsPatchedReturnSequence()) || |
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(IsDebugBreakSlot(rmode()) && IsPatchedDebugBreakSlotSequence())); |
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// The pc_ offset of 0 assumes mips patched return sequence per
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// debug-mips.cc BreakLocationIterator::SetDebugBreakAtReturn(), or
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// debug break slot per BreakLocationIterator::SetDebugBreakAtSlot().
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return Assembler::target_address_at(pc_);
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} |
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void RelocInfo::set_call_address(Address target) {
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ASSERT((IsJSReturn(rmode()) && IsPatchedReturnSequence()) || |
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(IsDebugBreakSlot(rmode()) && IsPatchedDebugBreakSlotSequence())); |
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// The pc_ offset of 0 assumes mips patched return sequence per
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// debug-mips.cc BreakLocationIterator::SetDebugBreakAtReturn(), or
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// debug break slot per BreakLocationIterator::SetDebugBreakAtSlot().
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Assembler::set_target_address_at(pc_, target); |
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if (host() != NULL) { |
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Object* target_code = Code::GetCodeFromTargetAddress(target); |
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host()->GetHeap()->incremental_marking()->RecordWriteIntoCode( |
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host(), this, HeapObject::cast(target_code)); |
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} |
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} |
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Object* RelocInfo::call_object() { |
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return *call_object_address();
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} |
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Object** RelocInfo::call_object_address() { |
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ASSERT((IsJSReturn(rmode()) && IsPatchedReturnSequence()) || |
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(IsDebugBreakSlot(rmode()) && IsPatchedDebugBreakSlotSequence())); |
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return reinterpret_cast<Object**>(pc_ + 2 * Assembler::kInstrSize); |
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} |
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void RelocInfo::set_call_object(Object* target) {
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*call_object_address() = target; |
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} |
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bool RelocInfo::IsPatchedReturnSequence() {
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Instr instr0 = Assembler::instr_at(pc_); |
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Instr instr1 = Assembler::instr_at(pc_ + 1 * Assembler::kInstrSize);
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Instr instr2 = Assembler::instr_at(pc_ + 2 * Assembler::kInstrSize);
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bool patched_return = ((instr0 & kOpcodeMask) == LUI &&
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(instr1 & kOpcodeMask) == ORI && |
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((instr2 & kOpcodeMask) == JAL || |
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((instr2 & kOpcodeMask) == SPECIAL && |
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(instr2 & kFunctionFieldMask) == JALR))); |
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return patched_return;
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} |
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bool RelocInfo::IsPatchedDebugBreakSlotSequence() {
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Instr current_instr = Assembler::instr_at(pc_); |
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return !Assembler::IsNop(current_instr, Assembler::DEBUG_BREAK_NOP);
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} |
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void RelocInfo::Visit(Isolate* isolate, ObjectVisitor* visitor) {
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RelocInfo::Mode mode = rmode(); |
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if (mode == RelocInfo::EMBEDDED_OBJECT) {
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visitor->VisitEmbeddedPointer(this); |
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} else if (RelocInfo::IsCodeTarget(mode)) { |
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visitor->VisitCodeTarget(this); |
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} else if (mode == RelocInfo::CELL) { |
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visitor->VisitCell(this); |
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} else if (mode == RelocInfo::EXTERNAL_REFERENCE) { |
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visitor->VisitExternalReference(this); |
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} else if (RelocInfo::IsCodeAgeSequence(mode)) { |
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visitor->VisitCodeAgeSequence(this); |
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#ifdef ENABLE_DEBUGGER_SUPPORT
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} else if (((RelocInfo::IsJSReturn(mode) && |
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IsPatchedReturnSequence()) || |
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(RelocInfo::IsDebugBreakSlot(mode) && |
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IsPatchedDebugBreakSlotSequence())) && |
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isolate->debug()->has_break_points()) { |
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visitor->VisitDebugTarget(this); |
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#endif
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} else if (RelocInfo::IsRuntimeEntry(mode)) { |
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visitor->VisitRuntimeEntry(this); |
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} |
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} |
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template<typename StaticVisitor> |
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void RelocInfo::Visit(Heap* heap) {
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RelocInfo::Mode mode = rmode(); |
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if (mode == RelocInfo::EMBEDDED_OBJECT) {
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StaticVisitor::VisitEmbeddedPointer(heap, this); |
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} else if (RelocInfo::IsCodeTarget(mode)) { |
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StaticVisitor::VisitCodeTarget(heap, this); |
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} else if (mode == RelocInfo::CELL) { |
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StaticVisitor::VisitCell(heap, this); |
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} else if (mode == RelocInfo::EXTERNAL_REFERENCE) { |
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StaticVisitor::VisitExternalReference(this); |
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} else if (RelocInfo::IsCodeAgeSequence(mode)) { |
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StaticVisitor::VisitCodeAgeSequence(heap, this); |
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#ifdef ENABLE_DEBUGGER_SUPPORT
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} else if (heap->isolate()->debug()->has_break_points() && |
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((RelocInfo::IsJSReturn(mode) && |
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IsPatchedReturnSequence()) || |
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(RelocInfo::IsDebugBreakSlot(mode) && |
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IsPatchedDebugBreakSlotSequence()))) { |
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StaticVisitor::VisitDebugTarget(heap, this); |
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#endif
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} else if (RelocInfo::IsRuntimeEntry(mode)) { |
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StaticVisitor::VisitRuntimeEntry(this); |
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} |
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} |
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// -----------------------------------------------------------------------------
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// Assembler.
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void Assembler::CheckBuffer() {
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if (buffer_space() <= kGap) {
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GrowBuffer(); |
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} |
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} |
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void Assembler::CheckTrampolinePoolQuick() {
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if (pc_offset() >= next_buffer_check_) {
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CheckTrampolinePool(); |
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} |
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} |
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void Assembler::emit(Instr x) {
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if (!is_buffer_growth_blocked()) {
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CheckBuffer(); |
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} |
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*reinterpret_cast<Instr*>(pc_) = x; |
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pc_ += kInstrSize; |
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CheckTrampolinePoolQuick(); |
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} |
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} } // namespace v8::internal
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#endif // V8_MIPS_ASSEMBLER_MIPS_INL_H_ |